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Table 0-1.
Pin Configuration
8-lead PDIP
8-lead SOIC
Pin Name
CS
SCK
Function
Chip Select
Serial Data Clock
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
SI
Serial Data Input
8-lead TSSOP
8-lead Ultra Thin Mini-MAP (MLP 2x
SO
GND
Serial Data Output
Ground
CS
SO
WP
GND
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
VCC 8
HOLD 7
SCK 6
SI 5
1
2
3
4
CS
SO
WP
GND
VCC
Power Supply
Bottom View
WP
Write Protect
8-lead MAP
8-lead ULLGA
HOLD
NC
Suspends Serial Input
No Connect
VCC
HOLD
SCK
SI
8
7
6
5
1
2
3
4
CS
SO
WP
GND
VCC
HOLD
SCK
SI
8
7
6
5
1
2
3
4
CS
SO
WP
GND
DC
Don’t Connect
Bottom View
Bottom View
Block write protection is enabled by programming the status register with one of four blocks of
write protection. Separate program enable and program disable instructions are provided for
additional data protection. Hardware data protection is provided via the WP pin to protect
against inadvertent write attempts to the status register. The HOLD pin may be used to suspend
any serial communication without resetting the serial sequence.
1. Absolute Maximum Ratings*
Operating Temperature ................................ –55 ? C to +125 ? C
Storage Temperature.................................... –65 ? C to +150 ? C
Voltage on Any Pin
with Respect to Ground .................................... –1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
DC Output Current........................................................ 5.0 mA
2
AT25080A/160A/320A/640A
3347L–SEEPR–06/07
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